Analog Devices authors report automatic real-number abstraction for mixed-signal SoC verification
A DVCon 2016 paper by Analog Devices authors reports automatically generating schematic-consistent, high-fidelity real-number abstractions for mixed-signal SoC verification. The authors describe deployment across several ADI SoC tapeouts, detection of subtle design bugs, and circuit-simulation speedups greater than 1,000x while preserving the analog-function accuracy needed for the reported verification cases.
Evidence
Mixed-Signal Systems-on-Chip Design Verification with Automatic Real-Number Abstraction ↗
DVCon's record identifies the Analog Devices paper on automatically generated real-number abstractions for SoC verification.
Mixed-Signal Systems-on-Chip Design Verification with Automatic Real-Number Abstraction — paper ↗
The paper reports the abstraction flow, use across ADI tapeouts, defect detection, and its stated simulation-speed and accuracy results.