Analog Devices authors report RNM and generated UVM testbenches for a 2.4 GHz transceiver SoC
An Analog Devices-authored paper reports verification of a 2.4 GHz BLE and proprietary-mode transceiver SoC using UVM RF agents, real-number models, randomized packet parameters and blockers, and full-system pads-to-RTL simulation. The paper also describes Veri-DSP, an internal flow that generated UVM block testbenches and integrated Python post-processing for DSP verification.
Evidence
Advances in RF Transceiver SoC Verification ↗
2017 Analog Devices paper covering UVM, RF agents, RNM, full-system verification, and the Veri-DSP testbench-generation flow.