Bosch authors report cross-level verification across virtual, RTL, and mixed-signal representations

Robert Bosch authors report a cross-level verification flow that applies the same use-case scenarios across system specifications, virtual prototypes, RTL and mixed-signal design representations, and production software. The paper describes automated signal mapping and trace comparison and presents an automotive ASIC case study intended to expose inconsistencies among parallel representations and exercise mixed-signal hardware with real-field software scenarios.