Intel job posting seeks AI-assisted development and analysis of AMS behavioral models

An Intel AMS Verification Engineer posting describes SystemVerilog behavioral models for SerDes, PMU, and DC-DC circuits, integration with digital functional verification, AMS comparison to the models, and full-chip power-up simulation. It also asks for generative-AI code generation, AI-driven debugging, automated documentation, and AI-based workflows for model development, simulation analysis, and reporting. This is evidence of a public hiring mandate, not proof that every listed AI-assisted method was already deployed or measured.