Semtech Signal Integrity trainee role includes analog behavioral modeling and mixed-level simulation

Semtech posted Digital Design Verification Trainee REQ3462 in Aguascalientes for the Signal Integrity Product Business Unit’s Digital Design group, which develops mixed-signal ICs for data communications and video broadcast. The description allocates 50% of responsibilities to constrained-random digital verification, 10% to analog behavioral modeling and analog/digital mixed-level simulation, and 10% to verification-methodology improvement. SystemVerilog is preferred in the qualifications. This is a training and hiring mandate, not evidence of completed deployment or a specified RNM implementation.