Neurophos posted a Lead Verification Engineer role for its silicon-photonic AI platform. The position owns SoC verification strategy, UVM and constrained-random environments, SystemC model integration, regression automation, FPGA acceleration, gate-level sign-off, and development and verification of AMS and SystemVerilog models for in-house analog designs; AMS verification and RNM experience are also named as preferred skills. This is evidence of a hiring mandate, not proof of completed silicon or methodology deployment.