Apple posts an RNM SoC modeling role that ties model accuracy to verification objectives

Apple posted a Digital/Mixed Signal Modeling/Verification Engineer role for analog and RF blocks within a large SoC. The description assigns SystemVerilog RNM models with built-in checks, selecting the necessary modeling accuracy for each verification objective, assertions that define analog/digital specification checks and digital verification pass criteria, AMS environment setup with analog designers, and debugging digital-on-top chip testbenches. The scope includes power regulators, bandgaps, data converters, RF blocks and PLLs.