Apple

Last researched 2026-10-1517 indexed events

Public events shown here describe observable source material, not total internal activity.

202620252024202320222020–2018

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Oct 14, 2026

Apple advertises an AMS IP formal-verification internship in London

Apple posted London internship 200688723 for its AMS IP team. The project develops property sets for hardware-model functional coverage, formalizes SVA properties, executes formal proofs and studies model-accuracy versus proof-convergence tradeoffs. It also extends the framework to integrate properties at higher levels for system verification. The posting describes proposed intern work within an AMS IP organization; it does not report completed proofs or a deployed formal flow.

Sep 22, 2026

Apple advertises agent governance and AI evaluation for AMS design and CAD workflows

Apple posted Analog Mixed-Signal Design Software Engineer role 200684916 on September 22, assigning agentic-AI orchestration for analog design data and a registry for agent versioning, rollback and audits, with human approval of agent changes. Related September 30 CAD role 200686566 assigns agent tuning, evaluation data, quality metrics and EDA integration across custom/analog design and other chip-design flows. These are advertised design-platform responsibilities, not evidence of autonomous analog architecture or behavioral-model generation; the postings do not establish a shared team.

Sep 14, 2026

Apple posts an RNM SoC modeling role that ties model accuracy to verification objectives

Apple posted a Digital/Mixed Signal Modeling/Verification Engineer role for analog and RF blocks within a large SoC. The description assigns SystemVerilog RNM models with built-in checks, selecting the necessary modeling accuracy for each verification objective, assertions that define analog/digital specification checks and digital verification pass criteria, AMS environment setup with analog designers, and debugging digital-on-top chip testbenches. The scope includes power regulators, bandgaps, data converters, RF blocks and PLLs.

Aug 28, 2026

Apple posts CAD roles covering cross-team AMS simulation methodology and AI-assisted automation

Apple posted related CAD Automation and Mixed-Signal Simulation Engineer roles in Austin and Sunnyvale. The senior description assigns ownership of AMS simulation methodology across analog, RF, interconnect, PMIC, and memory teams, spanning circuit and RTL simulation, behavioral modeling, co-simulation, logic equivalence, sign-off, and automation. Preferred experience includes discipline resolution, binding/IE setup, connect modules, AMSD blocks, wreal, RNM, UDN, and SystemVerilog/Verilog-A/Verilog-AMS. Both roles mention applying LLMs or AI agents to CAD software, test generation, and debug among preferred qualifications, with leadership of that work requested in the senior role.

Jul 16, 2026

Apple lists multiple Wireless Silicon Digital Mixed-Signal Modeling roles

Apple listed Wireless Silicon Digital Mixed-Signal Modeling Engineer roles in the San Francisco Bay Area and Beaverton on July 16. Related October 16 role 200689643 assigns accurate, simulation-efficient SystemVerilog models for analog/RF blocks, reusable monitors/checkers, test-plan execution, debug and flow automation. It explicitly develops emulation-ready models and requests understanding of synthesis-ready mixed-signal model requirements, with SystemC/C++ and high-level synthesis among preferred skills. These related postings are grouped with the existing wireless modeling mandate; the later role does not establish successful emulator execution or change the July Event date.

May 13, 2026

Apple lists wireless Mixed-Signal Verification Engineer roles

Apple listed Mixed-Signal Verification Engineer roles for RF and mixed-signal blocks and interfaces in wireless SoCs. The descriptions assign verification planning, mixed-signal and digital UVM testbenches, reusable monitors and checkers, coverage closure, automation, and methodology improvement using AI; real-numbered SystemVerilog behavioral-model experience appears as a preferred qualification.

Apr 23, 2026

Apple posts a PMU Digital Mixed Signal Modeling role

Apple posted PMU Digital Mixed Signal Modeling role 200659736, assigning SystemVerilog RNM, model-versus-schematic simulation, standalone validation, full-chip integration, reusable libraries, model accuracy metrics, regression and Python automation. The description states typical RNM closed-loop simulations exceed schematic speed by 100 times. Preferred experience includes LLM/AI-assisted coding for model or RTL development. This is a qualification signal, not an assigned AI model-generation workflow or independently verified speedup.

Apr 17, 2026

Selcuk Talay publicly recruits for his Apple PMU AMS design-verification team

Apple posted a PMU Analog & Mixed-Signal Design Verification role for Cupertino and Austin covering full-chip mixed-signal verification, analog/RTL co-simulation, verification planning, assertions, coverage, and sign-off. Selcuk Talay publicly shared the role and described it as hiring for "my AMS design verification team," directly connecting him to the recruiting team.

Apr 14, 2026

Apple posts an Analog Mixed-Signal Modeling Software role

Apple posted an Analog Mixed-Signal Modeling Software Engineer role whose description covers multi-simulator platforms, scientific-software and automation frameworks, custom model libraries, simulation frameworks, domain-specific languages, and web interfaces for AMS circuit design.

Jan 16, 2026

Apple job posting describes building a new AMS design-verification team in London

An Apple careers posting for an experienced AMS design-verification engineer says the role will help build a new team in London. It lists SystemVerilog and UVM verification, performance and power analysis, early power estimation, and research and innovation; AI and machine-learning experience appears as a desired qualification. This is evidence of a public hiring mandate, not proof that AI/ML or every requested method was already deployed.

Nov 17, 2025

Apple posts a Wireless Radio Verification role spanning digital and RF-modeled subsystems

Apple posted a Wireless Radio Verification Engineer role whose description covers radio digital controllers and Digital+RF subsystems spanning PLL, DAC and ADC data paths, power management, and coexistence. The hiring mandate includes UVM environments, constrained-random tests, coverage and assertions, and digital-plus-mixed-signal co-simulation integrating SystemVerilog behavioral and DMS models.

Oct 1, 2025

Apple's Aeon internships describe AMS models, LLM workflows and SPICE-based accuracy checks

Apple posted an Aeon Modeling Intern role in Munich on October 1, 2025 for AMS interface models, circuit/measurement comparison, automation and LLM-assisted development. Related role 200690119, posted October 19, 2026, assigns Python/C++ models for SerDes, PLLs, memory interfaces and converters; ML surrogate models trained on circuit simulations and silicon measurements; LLM/agent workflows for specification-to-model generation, code translation, tests and documentation; and automated accuracy checks against SPICE and measurements. It also proposes GPU/parallel acceleration and model-order reduction, with documented accuracy bounds and engineer ownership of correctness. The later recruitment is grouped with the existing Aeon mandate, without changing its original date or asserting completed AI-modeling results.

Jun 18, 2025

Apple lists dedicated Mixed-Signal Model Verification roles

Apple listed Mixed-Signal Model Verification Engineer roles whose description includes self-checking SystemVerilog testbenches that compare behavioral models with source circuits, functional checks against specifications, assertions, formal logical equivalence, lint and timing checks, and flow automation across mixed-signal design teams.

Dec 3, 2024

Apple posts a Mixed-Signal Behavioral Modeling Engineer role

Apple posted a Mixed-Signal Behavioral Modeling Engineer role whose description includes SystemVerilog models that capture functional and non-ideal behavior, circuit-simulation and formal-equivalence checks, reusable modeling methodology, functional coverage, and automation for PLL/DLL, SerDes, sensor, and data-converter circuits.

May 17, 2023

Apple posts a cellular RF Digital-Mixed-Signal Verification role

Apple posted a Digital-Mixed-Signal Verification Engineer role for cellular RF work whose description covers SystemVerilog behavioral models for LNA, PLL, ADC, DAC, and mixer blocks at multiple abstraction levels, matching models to schematic specifications, assertions, and UVM-based sub-system and system verification.

Oct 21, 2022

Apple Cellular and Connectivity team member advertises a Munich Digital Mixed-Signal Design/Verification role

An Apple Cellular and Connectivity team member publicly advertised a Digital Mixed-Signal Design/Verification Engineer role in Munich, one of four analog and mixed-signal design, validation, and verification openings in the hiring notice.

Oct 2018

Toshi Kawashima's profile dates an Apple DMS verification role to October 2018

Toshi Kawashima's public professional profile dates the start of his Apple role as Manager, DMS (Digital Mixed-Signal) Design Verification to October 2018 and says he leads a team responsible for DMS and AMS verification and methodology work across mixed-signal LSI projects.