Freescale author reports generating mixed-signal abstraction models from circuit-simulation traces
A 2010 journal paper coauthored by Freescale Semiconductor's Scott Little proposes automatically generating abstraction models from transistor-level simulation traces for formal verification and system simulation. The paper demonstrates the approach on a switched-capacitor integrator and a PLL phase detector and evaluates how the generated models reproduce the observed circuit behaviors.
Evidence
Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces ↗
The 2010 journal record identifies Scott Little with Freescale Semiconductor and describes automatic generation of abstraction models from transistor-level traces for formal verification and system simulation.