Infineon authors report Analog UVM stimulus and automated behavioral-model comparison
Two Infineon DVCon 2014 papers describe an Analog UVM library for constrained-random analog transactions and automated comparison of analog behaviors. The model-validation flow uses an earth mover's distance implementation connected through SystemVerilog and C to convert waveform comparison into regression pass/fail results, reducing reliance on manual waveform inspection.
Evidence
Generation of Constraint-Random Transactions for Verification of Mixed-Signal Blocks ↗
The Infineon paper presents an Analog UVM library and constrained-random analog transactions for mixed-signal block verification.
Automated Comparison of Analog Behavior in a UVM Environment ↗
DVCon's record identifies the Infineon model-comparison work and its UVM context.
Automated Comparison of Analog Behavior in a UVM Environment — paper ↗
The paper details earth-mover-distance waveform comparison, SystemVerilog/C integration, and automated pass/fail regression use.