Infineon author reports UVM-based AMS verification of automotive mixed-signal requirements
A DVCon 2016 paper by Infineon's Silvia Strähle describes UVM-based verification of an automotive mixed-signal design with more than 1,000 requirements. The environment could exchange a VHDL behavioral model for a transistor-level netlist where needed and checked analog quantities and operating conditions including temperature, overcurrent, and overtemperature behavior.
Evidence
AMS Verification in a UVM Environment ↗
DVCon's record identifies Silvia Strähle of Infineon and the UVM-based AMS verification paper.
AMS Verification in a UVM Environment — paper ↗
The paper details the automotive requirements context, behavioral-model and netlist substitution, and analog-condition checks.