Cadence reports an Infineon/Tessolve project using PSS/Perspec for verification reuse
Cadence reported that a verification-reuse effort presented at CadenceLIVE India 2023 came from a joint Infineon, Tessolve and Cadence project. Infineon owned the DUT and verification environment, Tessolve developed and executed PSS/SLN models in Perspec, and Cadence supplied PSS methodology/tool support. Cadence's described use case ran the models with a Specman e simulation testbench and Linux at SoC level, while targeting reuse across IP, subsystem, SoC and silicon.
Evidence
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Cadence report on a joint Infineon, Tessolve and Cadence project using PSS/SLN models in Perspec across simulation and SoC Linux execution, with broader reuse as the stated methodology goal.