Infineon authors present AI-based mixed-signal modeling with SystemVerilog RNM
The official DVCon India 2025 agenda lists an Infineon presentation titled 'Scalable and cost-effective mixed signal modelling using AI with SV-RNM' by Sathyanarayana Ramamoorthy, Rutvikkumar Patel, Anand Rahul, Kranthi Kiran, and Hareesh Perumal. The public agenda establishes the presentation and its stated topic; without a retained paper, this Event does not assert a specific model-generation method, result, or deployment scope.
Evidence
DVCon India 2025 agenda ↗
The official agenda dates the Infineon-authored presentation to September 11, 2025 and identifies its title, authors, affiliation, and SystemVerilog RNM and AI topic.