Infineon seeks a Senior Staff engineer for AI-based SV-RNM and automotive AMS verification
Infineon's Bengaluru Senior Staff Engineer Analog Mixed-Signal Verification posting assigns AI-based SystemVerilog real-number behavioral models with speed/accuracy tradeoffs for pre-silicon verification. The role leads automotive subsystem and analog-on-top full-chip verification, develops AMS plans, SPICE-netlist integration, checkers, assertions and coverage, and models bandgaps, LDOs and buck-boost regulators. This is an advertised development and methodology-leadership mandate; the posting does not disclose an AI algorithm, model-generation results or production adoption.
Evidence
Infineon Careers: Senior Staff Engineer Analog Mixed-Signal Verification ↗
Official JobPosting datePosted is October 5, 2026. Assigned work explicitly includes AI-based SV-RNM, accuracy/runtime tradeoffs and automotive subsystem/full-chip verification; this is separate from the earlier graduate and internship advertisements.
Infineon employer LinkedIn: Senior Staff AMS verification ↗
Employer-attributed description independently repeats the AI-based SV-RNM assignment. Current LinkedIn metadata dates this copy October 7; that later platform date is not substituted for the official October 5 date.