Infineon lists AMS internships covering behavioral models, corner validation and regression automation
On October 5, Infineon listed related AMS verification internships in Andover and Shanghai. The Andover role assigns Verilog-AMS/SystemVerilog behavioral models, testbenches, regressions and device/system checks under nominal and corner conditions. The Shanghai role covers AMS IP and SoC environments, SPICE/Verilog-AMS/Spectre simulations, RTL/model integration debug, Python-based regression reporting, and validation of model assumptions and corner behavior. These related student hiring signals are grouped in one Event.
Evidence
Infineon: Andover AMS design-verification internship — employer LinkedIn posting ↗
Employer posting checked October 5, 2026; first publication is not established. It describes behavioral models, verification plans, testbenches, regressions and nominal/corner validation.
Infineon: Shanghai mixed-signal verification internship — employer LinkedIn posting ↗
Employer posting checked October 5, 2026; first publication is not established. It includes AMS IP/SoC simulations, Python automation and model-quality checks for assumptions and corners.