Infineon keynote describes generative-AI real-number-model creation within an AI-based verification methodology
A SMACD 2026 keynote by an Infineon principal engineer describes industrial experience connecting AI assistants, retrieval-augmented knowledge systems, and EDA tools through APIs, along with a current focus on an AI-based verification methodology. Its concrete example generates SystemVerilog real-number models from schematics, specifications, or other source models while emphasizing domain knowledge, guardrails, compliance, and human review. This Event records the scope described by the keynote, not a measured deployment result.
Evidence
AI Transformation in IC Development: An Industrial Perspective on Reshaping Verification Methodology in the Generative-AI Era ↗
The official keynote page identifies Joachim Glas and Infineon and describes the AI-assistant, RAG, EDA-API, guardrail, human-in-the-loop, and SystemVerilog RNM example scope.
SMACD 2026 programme ↗
The official programme places the Joachim Glas keynote at 09:00 on Thursday, July 2, 2026.