Infineon keynote describes generative-AI real-number-model creation within an AI-based verification methodology
A SMACD 2026 keynote by an Infineon principal engineer describes industrial experience connecting AI assistants, retrieval-augmented knowledge systems, and EDA tools through APIs, along with a current focus on an AI-based verification methodology. Its concrete example generates SystemVerilog real-number models from schematics, specifications, or other source models while emphasizing domain knowledge, guardrails, compliance, and human review. This Event records the scope described by the keynote, not a measured deployment result.
Evidence
AI Transformation in IC Development: An Industrial Perspective on Reshaping Verification Methodology in the Generative-AI Era
The original URL returned 404 on October 19, 2026. The September 23 archive was reviewed on October 19 and explicitly identifies Joachim Glas, Infineon and the AI-assistant, RAG, EDA-API, guardrail, human-review and SystemVerilog RNM example scope.
Archived source ↗SMACD 2026 programme
The original URL returned 404 on October 19, 2026. The September 23 archive was reviewed on October 19: the Day 4 Thursday, July 2 table places Joachim Glas and AI Transformation in IC Development in the 09:00 keynote row of the SMACD 2026 programme.
Archived source ↗