Infineon retargets IEEE P1687.2 test descriptions into SystemVerilog UVM for automotive smart-power shift-left
An Infineon Automotive Power paper at ETS 2026 described retargeting IJTAG/IEEE P1687.2 test-case descriptions into top-level SystemVerilog UVM testbenches as a shift-left path for automotive smart-power devices. The reported framework uses a renderer and a lower-level pin-level time-stamp/value transport such as STIL, and the paper presents first device results.
Evidence
Shift-Left by applying IEEE P1687.2 to SystemVerilog test-benches for Automotive Smart-Power devices ↗
Infineon Automotive Power paper describing retargeting IEEE P1687.2/IJTAG test descriptions into top-level SystemVerilog UVM testbenches for smart-power devices.