Intel and Siemens authors report AI-accelerated high-sigma level-shifter verification

An Intel and Siemens DAC 2026 presentation reports an adaptive-AI flow that identifies worst-case corners and applies brute-force-accurate high-sigma verification only where needed. For the presented level-shifter cases, the authors report 3× faster 3-sigma single-cell validation, a 10× overall runtime reduction across 256 cells at 6 sigma, and more than 14× reduction for targeted multibit glitch-height analysis. These metrics remain bounded to the reported cases and do not establish a company-wide Intel methodology.