LSI and Cadence records describe RNM verification of a hard-disk-drive preamplifier
A 2011 DVCon paper by LSI and Cadence authors describes real-number models for mixed-signal verification of a hard-disk-drive preamplifier and reports roughly 24x speedup over the referenced SPICE simulation with about 0.3% gain inaccuracy. A later Cadence-authored report describes LSI applying the models in mixed-signal SoC verification, reporting roughly 600x speedup, 95% accuracy, full functional coverage, and no functional bugs in first silicon. These performance and outcome statements retain their respective paper and vendor-report modalities.
Evidence
Metric Driven Verification of Mixed Signal Designs ↗
DVCon's record identifies LSI and Cadence authors for the HDD-preamplifier real-number-modeling case study.
Metric Driven Verification of Mixed Signal Designs — paper ↗
The paper reports the RNM architecture, simulation-speed comparison, accuracy result, and chip-level verification option.
Real Number Model Development and Application in Mixed-Signal SoC Verification ↗
Cadence's 2012 account reports LSI's application results, including its stated speed, accuracy, coverage, and first-silicon outcomes.