Microchip job posting combines full-chip mixed-signal verification with LLM-assisted debug and test work

A Microchip Senior Engineer I – Verification posting describes full-chip SoC and mixed-signal verification, SystemVerilog/UVM, analog-IP interactions, coverage closure, and cross-domain debug. Its AI scope includes LLM-assisted generation of code and stimuli, root-cause analysis and scripting, plus AI-driven log analysis, waveform triage, failure clustering, and trials integrated with EDA flows. This is evidence of a public hiring mandate, not proof that the listed AI-assisted techniques were already deployed or improved measured outcomes.