NVIDIA posts a mixed-signal cell modeling and verification role
On August 14, 2026, NVIDIA posted a role to develop behavioral models and verification environments for custom mixed-signal cells used across NVIDIA products. The listing names Verilog, SystemVerilog, Perl, and Python, and covers cells including PLLs and high-speed interconnects, emulation and prototyping, and library- and chip-level integration.
Evidence
Senior Cell Modeling and Verification Engineer ↗
Official NVIDIA role for behavioral modeling and verification of custom mixed-signal cells, including PLL and high-speed-interconnect applications.