NXP lists an internship to generate mixed-signal VIP and assertions from specifications using AI agents
On October 5, NXP listed a Toulouse internship to prototype and evaluate AI-assisted verification-component generation for digitally controlled mixed-signal IP, particularly DC/DC converters. The project analyzes specifications for interfaces, control sequences and faults, generates reusable SystemVerilog/UVM components and coverage, and proposes assertions for protocols, timing, forbidden states and fault responses. Generated components are to be integrated and tested on representative examples, with robustness and limitations evaluated.
Evidence
NXP Careers: AI-assisted VIP and assertion generation internship (R-10066990) ↗
Official Toulouse research internship checked October 5, 2026; first publication is not established. The advertised project generates and evaluates verification components for digitally controlled mixed-signal IP; it does not establish a production-ready AI flow.