Apr 2011 – Nov 2014 · Technical

Tomokatsu Mizukusa's profile describes whole-chip Wreal and UVM-AMS verification work at Renesas

Tomokatsu Mizukusa's public professional profile describes his 2011–2014 Renesas role as developing EDA and design methodology for mixed-signal and analog systems. It specifically reports MCU and SoC whole-chip mixed-signal functional and connectivity verification using Verilog Wreal, along with SystemVerilog discrete-real modeling and UVM-AMS.

Evidence

Tomokatsu Mizukusa — LinkedIn ↗

Mizukusa's public profile directly associates whole-chip Wreal verification, SystemVerilog discrete-real modeling, and UVM-AMS with his April 2011–November 2014 Renesas role.

Available · checked 2026-08-30