Jaeha Kim presents reactive UVM measurement of modeled receiver jitter tolerance

Jaeha Kim presents a reactive UVM testbench for high-speed wireline receiver jitter tolerance at DVCon U.S. 2023. The slides identify Seoul National University and Scientific Analog affiliations and place the SystemVerilog/XMODEL transceiver, jitter stimulus and statistical BER instrumentation inside a fixture. Standard UVM components use prior BER results to select the next sinusoidal-jitter amplitude, with linear and binary searches for the pass/fail boundary. The example reports 106 trials at 20 jitter frequencies in 41 minutes for a target BER below 10^-12. The BER comes from statistical model instrumentation, not a measured silicon run or counting 10^12 received bits.