Sony interview describes timing assertions for exhaustive pixel and analog-control verification
A Sony Semiconductor Solutions recruiting interview describes building an H timing-assertion mechanism to exhaustively design-verify operating conditions for signals controlling image-sensor pixels and analog circuitry. The engineer presents the mechanism as a response to control signals that the prior design approach made difficult to verify.
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The official SSS recruiting interview, published on the site's 2023 edition, describes the H timing-assertion mechanism and its exhaustive verification of signals controlling pixels and analog circuits.