Sony Semiconductor

Last researched 2026-08-316 indexed events

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Sep 9, 2026

Sony and university researchers present LOADBench for analog circuit generation and topology-selection evaluation

The MLCAD 2026 program lists LOADBench with Stefan Uhlich, Lorenzo Servadei and university coauthors in the September 9 analog-design session. The work provides more than 100 SkyWater130 op-amp topologies, annotations and ngspice testbenches, with benchmarks including structural circuit generation and topology selection as well as sizing. The program lists Sony Semiconductor Solutions Europe and Sony AI; the later manuscript uses SonyAI affiliation labels. The October 15 arXiv upload supports this September research milestone and is not treated as a second Event or the first public presentation.

Aug 24, 2026

Sony AI and Sony Semiconductor Solutions authors publish LLM-SPICEMixer for analog netlist generation

Stefan Uhlich, Lorenzo Servadei and coauthors publish LLM-SPICEMixer, combining evolutionary circuit synthesis with an LLM operator that proposes new SPICE netlists from promising candidates. SPICE evaluation, rather than the language model, supplies the circuit reward. The task synthesizes transistor-level analog discriminant circuits. Author affiliations distinguish Sony AI in Switzerland, Sony Semiconductor Solutions in Japan and university collaborators. This is simulated topology-generation research, not fixed-topology sizing alone or evidence of production deployment.

Sep 20, 2024

Sony reports analog fault-injection verification for automotive mixed-signal image sensors

A Sony Semiconductor Solutions SNUG Japan presentation describes applying PrimeSim Custom Fault to analog circuits in automotive image sensors, which the session abstract identifies as mixed-signal ICs. It reports deriving fault-detection rates from the fault-injection verification and feeding the results back into the design to improve the detection rate.

May 9, 2023

Sony profile documents analog models and system simulators for automotive LiDAR sensor verification

A Sony Semiconductor Solutions feature profiles an Automotive Business Division engineer whose work included developing analog models and system simulators to test SPAD ToF depth-sensor circuit and signal-processing designs. The profile says she designed and verified an analog sensor circuit in 2022 and moved into sensor-circuit evaluation in 2023.

2023

Sony interview describes timing assertions for exhaustive pixel and analog-control verification

A Sony Semiconductor Solutions recruiting interview describes building an H timing-assertion mechanism to exhaustively design-verify operating conditions for signals controlling image-sensor pixels and analog circuitry. The engineer presents the mechanism as a response to control signals that the prior design approach made difficult to verify.

Jun 23, 2022

Sony reports SystemVerilog RNM verification for CIS analog/digital specification consistency

A Sony Semiconductor Solutions DVCon Japan presentation reports a CIS verification flow that models analog circuits as SystemVerilog Real Number Models to check analog/digital specification consistency early. The presentation reports a 3000x speedup compared with conventional SPICE and logic-simulator co-simulation.