Siemens reports TOPPAN cut full-chip CMOS image-sensor mixed-signal verification time by more than 50%
A Siemens EDA customer-story recap reports that TOPPAN presented a full-chip mixed-signal verification workflow for a complex CMOS image sensor integrating a microcontroller with analog blocks including LDO, PLL, and temperature sensors. Siemens reports that Symphony reduced TOPPAN's mixed-signal verification time by more than 50% without compromising accuracy; this is a vendor-published customer report.
Evidence
Mixed-Signal Verification: Symphony Customer Success Stories across the Siemens EDA and Solido Custom IC Forums ↗
Siemens EDA's vendor-published customer-story recap of TOPPAN's full-chip CMOS image-sensor verification workflow and reported verification-time reduction.