Thilo Vörtler

3 indexed events

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202620252022

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Sep 10, 2026

COSEDA tutorial presents SystemC-AMS virtual prototypes as verification reference models

The DVCon Japan program lists a tutorial by COSEDA presenters Thilo Vörtler and Karsten Einwich on SystemC and SystemC-AMS virtual prototypes. Its published scope covers executable specifications for heterogeneous systems, analog/digital/software test development and reference models for implementation verification. The tutorial also previews future SystemC-AMS standardization; a preview is not a formally issued standard.

Aug 20, 2025

COSEDA authors present a C++ assertion library for SystemC AMS verification

A DVCon Japan 2025 presentation by COSEDA Technologies authors describes a pure-C++ assertion library for SystemC AMS using templates and operator overloading to provide SVA-like expression of temporal properties, including support for timed-data-flow models. This records a presented library and its stated capabilities, not a semiconductor-customer deployment.

2022

COSEDA and research authors present a cross-domain assertion library for SystemC AMS models

A 2022 DVCon Europe paper by COSEDA Technologies and research-institute authors presents a heterogeneous assertion-based-verification library for mixed-signal virtual prototypes in SystemC AMS. The work-in-progress prototype targets interactions across software, transaction-level, digital, and analog domains. This records the published library and examples, not evidence of deployment by a semiconductor customer.