Mar 6, 2024InnoPhase and Designer's Guide authors report Python-generated UVM testbench infrastructure for AMS designsA DVCon U.S. 2024 paper by InnoPhase and Designer's Guide Consulting authors reports a Python and Jinja flow that generates UVM testbench infrastructure from a DUT port list, including analog interfaces and agents plus register-abstraction integration. The paper presents deterministic template-based automation; it does not describe an AI-generated testbench flow.