Monolithic Power Systems

Last researched 2026-10-062 indexed events

Public events shown here describe observable source material, not total internal activity.

2026

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Jun 11, 2026

MPS student listing assigns chip-top AMS verification and RNM, wreal and schematic models

An Arizona State University recruiting listing dated June 11 advertised an MPS Analog Mixed Signal Verification Intern role in San Jose for a 20–24 week Summer/Fall 2026 placement. The employer description assigns chip-top verification planning and AMS simulation for full-custom precision analog signal-chain ASICs, behavioral models ranging from RNM and logical models to Verilog-AMS electrical/wreal and schematic models, register and trim-mode debug with analog schematics and post-layout RTL, and regression and infrastructure support. June 11 is the university listing's recruitment date; the listed application deadline was June 19.

2026

MPS lists a lead role to define its mixed-signal design and verification framework

Monolithic Power Systems lists a Mixed-Signal Design & Verification Engineer Lead role to define and lead framework and infrastructure development for complex digital and mixed-signal ICs. The position covers behavioral modeling, analog and mixed-signal IP integration and verification, mixed-mode simulation, analog-digital interface definition, and post-silicon validation across power, sensing, motor-control, display, and audio products. This is evidence of a current hiring mandate, not proof of completed deployment.