NXP and Siemens authors report an adaptive AI/ML flow for high-sigma analog verification
An NXP and Siemens DAC 2026 presentation reports an adaptive AI/ML verification flow that moves from a bandgap reference to an LDO case and compares the modeled results with production-silicon measurements. For the presented cases, the authors report more than 64,000× acceleration relative to brute-force simulation. The result is a bounded customer/vendor case study, not a general claim about all NXP verification.
Evidence
Achieving "zero Defect" Quality in Automotive Ethernet Solutions with AI-Accelerated Trimming & Verification ↗
The official DAC 2026 record identifies NXP and Siemens authors and describes the bandgap-to-LDO adaptive AI/ML method, production-silicon correlation, and reported greater-than-64,000× acceleration.